hs12

zhenghaibo1988

HCS12 Course Description


The HCS12 course covers the major hardware and software features of the new product line of Motorola HCS12 family which is targeted for high performance, low power and cost sensitive applications.


The course provides extensive coverage of the HCS12 instruction set architecture, overall system operation, I/O peripheral and application examples. The first part of the course will enable the student to write HCS12 assembly & C- language programs.

The course covers in detail the HCS12 interrupts, External Bus Interface, and operating modes. It covers HCS12 family of peripherals, such as SCI, SPI, PIT, and Watchdog timer, Enhanced Capture Timer, A/D Converter, CAN Bus, Inter-IC Bus, BDLC and Debug modes.


Course Outline:

Section I

01 – Road Map
       
-        Introduction
-        System Frequency
-        Low Power Modes
-        System Architecture
-        Target Applications
-        HCS12 Vs MC68HC12

02 – Central Processor Unit

-         Programming Model
-         Addressing Modes
-         Instruction Set
-         Instruction Timing
-         Stack Operation & Manipulation
-         Program Examples

03- Modes of Operation

-        Single Chip Mode
-        Expanded Mode
-        Special Modes
-        System Configuration
-        Resource Mapping
-        External Bus Interface
-        Memory Expansion
-        Port Integration Module



04 – System Exceptions

-        Internal & External Resets
-        System Protection
-        Error Recovery
-        Periodic Interrupt Timer
-        Exceptions Processing
-        Stack Frames
-        Interrupt Handling & Nesting
-        Recovery from low power Modes





Section II – MCU Peripherals

01-        Serial Communication Ports (SCI & SPI)

-        Features
-        Functional Description
-        Transmit & Receive Operation
-        SCI/SPI Modes and Interrupt Handling
-        Registers & Port Description
-        Application Examples



02 – Enhanced Capture Timer (ECT) & PWM

-        Features
-        Timer Clock Generation
-        Input Capture Operation
-        Pulse/Period Width Measurement
-        Output Compare Operation
-        Pulse Width Modulation
-        PWM Left and Center Aligned Operation
-        Pulse Accumulation
-        Application & Program Examples



03 – Analog to Digital Converter

-        Features
-        Functional Description
-        Port Description & Operation
-        Conversion Modes
-        External Trigger Control
-        Clock Selection
-        Application Example

04 – Byte Data Link Controller (BDLC)

-        BDLC Overview
-        Transmit Operation
-        Receive Operation
-        Message Processing
-        In-Frame Response Types and Processing
-        Interrupt Handling
-        Signal and Register Description
-        Low Power Operation
-        Application Example



05 – CAN Bus Interface (MSCAN)

-        Functional Description
-        CAN 2.0 A/B Protocol Specification
-        Standard and Extended I.D. Description
-        Message Buffer Structure
-        Message Reception and Transmission Processing
-        Fault confinement
-        Error Detection and Recovery
-        Bit Timing and Encoding
-        Low Power Modes
-        Application Example


05 – Inter-IC Bus (IIC)

-        Features and operating Modes
-        Bus Protocol
-        Signal & Register Description
-        Low Power Modes
-        Application Example









Section III – System Memory

-        Functional Description
-        Flash & EEPROM Memory Organization
-        Erase & Program Sequence
-        Security & Protection Features
-        Register Description
-        Memory Mapping
-        Interrupt on Command Completion Sequence





Section IV- Development Support

01 – Break Point Module
-        Basic Operations
-        Interface Signals
-        Breakpoint Types & Modes

02 – Debug Module
-        Operation
-        Instruction Queue
-        Interface Signals
-        Firmware & Hardware Debug Commands

03 – Debug Tools