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标题: 单片机超频是与硬件系统的外部晶振源有关的吧 [打印本页]

作者: junjianjunjian 时间: 2010-4-17 19:13
标题: 单片机超频是与硬件系统的外部晶振源有关的吧
很多人都在找相关超频的代码，但是我想，这个还与自身的外部晶振源有关的吧，比如说，我的外部晶振是16M的，那么，我还能用PLL超到80M吗？？

作者: 王怀玉 时间: 2010-4-17 19:13
超频代码

#include <hidef.h>    /* common defines and macros */
#include <MC9S12XS128.h>    /* derivative information */
#pragma LINK_INFO DERIVATIVE "mc9s12xs128"

void delayms(int ms)
{
int ii,jj;
if (ms<1) ms=1;
for(ii=0;ii<ms;ii++)
   for(jj=0;jj<3338;jj++); //40MHz--1ms
}
void SetBusCLK_16M(void)
{
CLKSEL=0X00; // disengage PLL to system
PLLCTL_PLLON=1; // turn on PLL
SYNR=0x00 | 0x01; // VCOFRQ[7:6];SYNDIV[5:0]
                     // fVCO= 2*fOSC*(SYNDIV + 1)/(REFDIV + 1)
                     // fPLL= fVCO/(2 × POSTDIV)
                     // fBUS= fPLL/2
                     // VCOCLK Frequency Ranges  VCOFRQ[7:6]
                     // 32MHz <= fVCO <= 48MHz 00
                     // 48MHz <  fVCO <= 80MHz 01
                     // Reserved                10
                     // 80MHz <  fVCO <= 120MHz 11
REFDV=0x80 | 0x01;  // REFFRQ[7:6];REFDIV[5:0]
                     // fREF=fOSC/(REFDIV + 1)
                     // REFCLK Frequency Ranges  REFFRQ[7:6]
                     // 1MHz <= fREF <=  2MHz    00
                     // 2MHz <  fREF <=  6MHz    01
                     // 6MHz <  fREF <= 12MHz    10
                     // fREF >  12MHz             11
                     // pllclock=2*osc*(1+SYNR)/(1+REFDV)=32MHz;
POSTDIV=0x00;    // 4:0, fPLL= fVCO/(2xPOSTDIV)
                     // If POSTDIV = $00 then fPLL is identical to fVCO (divide by one).
_asm(nop);       // BUS CLOCK=16M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_32M(void)
{
CLKSEL=0X00; // disengage PLL to system
PLLCTL_PLLON=1; // turn on PLL
SYNR =0x40 | 0x03;  // pllclock=2*osc*(1+SYNR)/(1+REFDV)=64MHz;
REFDV=0x80 | 0x01;
POSTDIV=0x00;
_asm(nop);       // BUS CLOCK=32M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_40M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x04;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=80MHz;
_asm(nop);       //BUS CLOCK=40M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_48M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x05;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=96MHz;
_asm(nop);       //BUS CLOCK=48M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_64M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x07;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=128MHz;
_asm(nop);       //BUS CLOCK=64M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_80M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x09;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=160MHz;
_asm(nop);       //BUS CLOCK=80M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_88M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0a;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=176MHz;
_asm(nop);       //BUS CLOCK=88M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_96M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0b;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=192MHz;
_asm(nop);       //BUS CLOCK=96M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_104M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0c;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=208MHz;
_asm(nop);       //BUS CLOCK=104M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}
void SetBusCLK_120M(void)
{
CLKSEL=0X00; //disengage PLL to system
PLLCTL_PLLON=1; //turn on PLL
SYNR =0xc0 | 0x0d;
REFDV=0x80 | 0x01;
POSTDIV=0x00;    //pllclock=2*osc*(1+SYNR)/(1+REFDV)=240MHz;
_asm(nop);       //BUS CLOCK=120M
_asm(nop);
while(!(CRGFLG_LOCK==1));    //when pll is steady ,then use it;
CLKSEL_PLLSEL =1;          //engage PLL to system;
}

作者: 我的A计划 时间: 2010-4-17 19:50
可以的，我们的另外一队就超到了80M!

作者: 我的A计划 时间: 2010-4-17 19:51
不信你超频，但是可能会死机，就是单片机死机

作者: junjianjunjian 时间: 2010-4-17 21:06
回复 3# 我的A计划
但是PLL计算的时候，公式里有个OSC，这个值是什么呢

作者: 王怀玉 时间: 2010-4-18 19:29
如果你的板子可以超频到96M建议使用80m，一次类推

作者: junjianjunjian 时间: 2010-4-19 23:31

如果你的板子可以超频到96M建议使用80m，一次类推
王怀玉发表于 2010-4-18 19:29

再菜菜的问一下，计算PLL频率的时候，公式里用到的OSC 是系统板上的外部晶振大小吗？？

作者: 王怀玉 时间: 2010-4-20 18:52
回复 7# junjianjunjian

不清楚

作者: qijitao 时间: 2010-5-8 14:41
学习了

作者: robotong 时间: 2010-6-29 07:57
不懂

作者: shuxinxiaozi 时间: 2010-7-9 16:57
学习了。不过确实没搞懂osc是怎么计算的？

作者: 阿尔卑斯一号 时间: 2013-4-12 18:32
请问怎样侧超频呢？

作者: 阿尔卑斯一号 时间: 2013-4-12 18:33
请问怎么测超频呢？

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